1. Field of the Invention
The solution according to an embodiment of the present invention regards the electronic field in general, and in particular it regards bumps for through vias.
2. Discussion of the Related Art
As it is known to those skilled in the electronic field, a through via is a substantially vertical electrical connection that completely crosses the entire thickness of a substrate—such as a silicon wafer or chip. The through vias allow electric signals, as well as supply and reference voltages, to reach deep portions of the chip. In this way, it is possible to exploit the space offered by a chip in an enhanced way, by integrating circuit devices in multiple active layers formed at different depths of the chip, with each active layer that is able to exchange electrical signals with the other ones by means of respective sets of through vias. Furthermore, thanks to the through vias, electric signals provided on a surface of the chip are able to cross the entire thickness of the chip, and reach the opposite surface thereof.
Presently, through vias are widely used for improving the so-called Multi-Chip Modules (MCM).
An MCM is an electronic system implemented on multiple chips—each one integrating a respective electronic circuit—that are arranged in a vertical stack. An MCM typically includes an interposer layer between each pair of adjacent chips of the stack. Said interposer layers are generally crossed by conductive wires having the purpose of electrically connecting pads of the various chips in the stack. However, since the chips are stacked on each other, the routing of the conductive wires crossing the interposer layers becomes very complicated, with a corresponding increase of the parasitic effects.
In order to reduce the negative impact resulting from complicated routing, modern MCMs are now implemented with chips having through vias. In this way, the exchange of electric signals between a pair of adjacent chips in the stack can be carried out by means of conductive paths (the through vias) that cross the higher chip in the pair, without the need of any conductive wire having to exit out of and move around the higher chip in order to reach the lower one.
Particularly, according to a first solution known in the art, the two ends of the through vias of the chips of the pair are provided with corresponding pads made of conductive material, and formed on both surfaces of the chips. In this case, an electric signal generated by an electronic circuit that is integrated on an upper surface of the higher chip can be fed to an electronic circuit integrated on an upper surface of the lower chip by simply wiring a pad formed on the lower surface of the higher chip with a corresponding pad on the upper surface of the lower chip.
Since the routing among the various chips of an MCM implemented in the way described above—i.e., by connecting the pads of the through vias—is definitely simpler compared to that required for an MCM including chips without any through via, the size of the interposer layers can be drastically reduced.
According to a second solution known in the art, it is possible to further compact an MCM by completely removing the interposer layers. Particularly, instead of forming conductive pads on both the ends of each through via, a first end (e.g., the one corresponding to the upper surface of the chip) is left “naked”, while the other end (e.g., the one corresponding to the lower surface of the chip) is provided with a solder bump made of conductive material. In this case, the bumps on the lower surface of a chip can be directly soldered to the upper ends of the through vias of the chip underneath. More in detail, after having correctly positioned the two chips in such a way to align the bumps on a surface of one chip to the ends of the through vias on the facing surface of the other chip, heat is provided to melt the solder material forming the bumps, so as to create a solid bond between the two chips.
However, none of the two solutions described above allows taking full advantage of the size miniaturization offered by the modern technologies for manufacturing integrated circuits. Indeed, even if modern technologies now allow obtaining through vias having very low diameters, the size of the pads and bumps that may be formed over the end of a through via cannot be miniaturized to the same extent. For example, as it is described in the document “Si Through-Hole Interconnections Filled With Au—Sn Solder by Molten Metal Suction Method” by Satoshi Yamamoto, Kazuhisa Itoi, Tatsuo Suemasu and Takashi Takizawa, Electron Device Laboratory, Fujikura Ltd., through vias may be generated by forming blind holes extending in the chip from a first surface thereof, filling said blind holes with conductive material according to the known Molten Metal Suction Method (MMSM), and then removing portions of the chip starting from the opposite surface of the chip until the conductive material is exposed. This solution allows obtaining through vias with diameters lower than 30 μm. However, the typical diameter of a bump obtainable with the current technologies is much larger, typically of the order of 100 μm, with potential scaling capability of 40/50 μm in the following future. From these values it is clear that the number of electrical interconnections available on the surface of a chip for an MCM is strongly limited by the non-negligible size of the bumps. This is a serious problem, since a modern electronic system implemented on a MCM may require a number of electrical interconnections equal to 10,000-15,000. Using the solutions already known in the art, implementing an electronic system on an MCM with said high number of electrical interconnections requires the use of chips having wide surfaces, going against the trend of having electronic devices miniaturized as much as possible.
Another important problem to be considered regards the routing of electronic systems for digital applications to be implemented by means of MCMs. Generally, it is possible to functionally divide a generic electronic system for digital applications in two main functional units, which have to communicate to each other: a processing unit, adapted to process data, and a memory unit, adapted to store the data to be processed by the processing unit. Thus, in an MCM for digital applications, the processing unit is implemented by means of a dedicated chip integrating a microprocessor (baseband chip), while the memory unit is advantageously implemented by means of a set of chips each one dedicated to integrate a respective memory circuit; for example, one or more chips may integrate respective RAMs, further one or more chips may integrate respective ROMs or flash memories, and so on.
Naturally, an MCM made of a stack of memory chips together with the baseband chip suffers from the abovementioned drawbacks as well due to the non-negligible sizes of the bump obtainable with the actual technologies. Moreover, a MCM for digital applications generally suffers from additional routing drawbacks, mainly given by the great variety and diversity of the chips that are stacked in a same MCM. Indeed, the number of electrical interconnections of the memory chips is in general very different from that of the baseband chip; moreover, the various memory chips are generally different from each other, and have generally very different sizes. Therefore, using the approaches known in the art, it is really difficult to implement an electronic system by means of an MCM having a compact size.
In view of the state of the art outlined in the foregoing, the Applicant has faced the problem of how to improve the known solutions for manufacturing bumps for through vias.